Low power consumption and high precision design of ultrasonic flowmeter

1. Low power consumption and high precision of the ultrasonic flowmeter design 1. 1 the system composing of ultrasonic flowmeter system principle block diagram is shown in figure 1. The ultrasonic flow meter by measuring pipeline, switching circuit, ultrasonic sensor driver circuit, amplifying circuit, filter circuit, compare circuit, temperature compensation circuit, CPLD, MSP430 single chip microcomputer and buttons display circuit, etc. Zero power CPLD6 handling part mainly complete the ultrasonic sensor drive circuit of the control and signal receiving, after amplification, filtering, comparative complete time lag of low power consumption, high precision measurement. MSP430 MCU mainly complete the flow calculation, temperature compensation, and display key reception. In order to reduce power consumption, ultrasonic drive circuit, amplifier filtering, comparison circuit of power supply or not by MSP430 single chip microcomputer control switch, low-power MSP430 MCU state can reach several & mu; A, & other; Zero power consumption & throughout; CPLD static power is only a couple of dozen & mu; A, when 4 MHZ frequency counter work the power consumption in 100 & mu; A left and right sides, MSP430 MCU and & other; Zero power consumption & quot; CPLD is often power state. 1. 2 low-power high precision time measuring method in ultrasonic flow measurement system, the time measuring is the key to measure the super lupo measurement system measuring accuracy, previous methods are used to improve the clock frequency of the ways to solve the problem of high precision measurement, but the clock frequency increase led to the increase in power consumption, low power consumption and high precision can't get at the same time, low power consumption and high precision ultrasonic flow dispute solves this problem. In this paper, the low power consumption and high precision time measurement with double clock finish ultrasonic signal measurement. Timing clock is divided into school low pulse frequency clock signal and clock signal T22 a part of high frequency pulse. The clock with low frequency pulse signal T1 by counter T1 measurement, high frequency pulse of the clock signal measured T2 by counter T2. Before the arrival of the ultrasonic echo without using low frequency clock signal timing; When using high frequency pulse ultrasonic reflection signal reaches the clock signal time T2, so using two different frequency clock signal measuring time can reduce the power consumption of the system, and can guarantee a high accuracy of measurement. Low power consumption and high precision time measuring principle diagram is shown in figure 2. S position in figure 2 is the ultrasonic reflection signals arrive, S2 position for the reflected signal T1 clock up along the moment arrived. Reflected signal when they arrive, be in namely S position, T1 counter stop counting, timing time set as T1, and immediately start the high frequency signal counter T2, T2 time to reach the moment of reflection signal a T1 stops, the delay time T2 timer time set to T2, so the spread of the super lupo time t by low frequency pulse high rate of the clock signal timing time T1 and frequency of the pulse of the clock signal timing time 1, can be obtained by calculation as shown in type: t = T1 + ( 1、t1- t2) When used in low frequency count that can achieve low power consumption, although when timing with high frequency power consumption is very big, but it is short of electricity consumed is very small. 1. 3 low power consumption and high precision timing the hardware realization circuit of ultrasonic flow meter low-power hardware realization of high precision timing circuit design USES IspMach4064ZC CPLD chip, this chip ZUI high frequency 400 MHZ, static power consumption of only 10 & mu; A, very suitable for the design of low power system. I1 and I2 as two 8-bit counter, I5 and I6 high frequency oscillator, I7, D flip-flop. Low power consumption and high precision timing circuit implementation is shown in figure 3. When ultrasonic signal emission, the Stop signal as low level, I1, count low frequency clock signal pulse of T1, keep a low level, the Stop signal I7 D flip-flop output for the low level, the I5 with I6 composed of high frequency oscillator is not shock; Sop when receives the ultrasonic echo signals for the high level, the counter Stop counting, high level signal to Stop the I5 with I6 produce full of vibration signals of high frequency oscillator, D flip-flop didn't flip, the output signal will remain low level until the arrival of the next T pulse high level, so the counter oscillation signals generated by 12 I5 with I6 down; Present a low frequency pulse arrive T1 along the clock signal, the output of D flip-flop flip, the output of high level, by inverting the I2 stop counting and keep counting data unchanged, until the CLR to clear. 1. 4 the working process of the circuit before the measurement, by MSP430 single chip microcomputer of timing clock signal, the output is a standard to calibrate the I5 in figure 3 and I6 oscillator, in order to adapt to different environmental temperature, and then by the MSP430 MCU output 4 MHZ clock pulse, for big time measurement, namely CPLD Zui long time running in high frequency mode only 250 ns, can achieve low power consumption and high precision time measurement. In CPLD to measure time by the MSP430 MCU read, carry out calculations, then the temperature of the measured signal to compensate by MSP430 single chip microcomputer calculations, ZUI measure the flow rate value, for display or remote transmission, etc. 2. Experimental data using the method development of ultrasonic flowmeter ( Randomly 5 3/4 'only) , the use of precision of 0. 2% of three respectively 10 l, 20 l, 100 l standard containers for verification, the flow velocity in the 50 l/h, application of 10 l standard quantity Jane; The flow rate of the 250 l/h cases, standard of 20 l Jane; Velocity conditions, application of 2500 l/h 100 l of standard measuring cylinder, pressure 1. 3 mpa pressure, the verification results are shown in table 1.

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